1. Field of the Invention
The present invention relates to an exposure method and exposure apparatus for producing a semiconductor integrated circuit, a liquid crystal display element, a thin film magnetic head, or another micro device or other semiconductor chip, a photomask, a reticle, etc. using photolithography, more particularly relates to an exposure method using an exposure apparatus able to perform processing in parallel on a plurality of wafers or other substrates, an exposure apparatus for the same, and a method of production of a device using such an exposure method and exposure apparatus.
2. Description of the Related Art
In the process of production of a wafer when producing a semiconductor integrated circuit etc., a desired circuit is formed on a silicon or other wafer by repetition of processing such as oxidation, thin film formation, doping, resist processing, exposure, etching, cleaning, chemical mechanical polishing (CMP), etc. Further, in the process of fabrication of a mask, a desired pattern is formed on a glass substrate or other substrate by similar processing such an resist processing, exposure, etching, etc.
When mass producing a semiconductor chip produced through such a process, the processing capability of how may wafers and substrates can be processed in a certain time at each step, that is, the throughput, in extremely important. Raising this is desirable.
To deal with such demands for higher throughput, recent processing apparatuses have been provided with a plurality of processing units for multiprocessing performing part or all of the processing simultaneously in parallel. For example, as shown in FIG. 8, various lithography systems for multifabrication, etching systems, resist coaters, resist developers, doping systems, CMP systems, etc. provided with two processing units have been commercialized. Further, film forming systems provided with three processing units have also been commercialized.
An example of multiprocessing in a processing apparatus having a plurality of processing units is shown schematically in FIG. 9.
As shown in FIG. 9, if loading a wafer cassette in a processing apparatus having two chambers for simultaneous processing, a wafer loader successively takes out wafers from the cassette and allocates them to the two chambers A and B. At that time, in a processing apparatus having two chambers, usually wafers of odd numbered and even numbered positions from one end in the wafer cassette are respectively loaded and processed in the same chambers. Further, after being subjected to predetermined processing in the same chambers, the wafers are again set in the wafer cassette and transported to the next step.
In a processing apparatus designed for multiprocessing, high speed processing is realized by processing a plurality of wafers or substrates simultaneously in parallel or providing a plurality of chambers and thereby shortening the wafer conveyance time.
As a projection exposure apparatus used in such a wafer processing step or mask fabrication step and transferring a pattern of a photomask or reticle on a wafer or glass substrate or other substrate coated with a photosensitive material (sometimes called a “sensitive substrate”), wide use is made of a step-and-repeat type reduction projection exposure apparatus (so-called “stepper”) or a step-and-scan type scan exposure apparatus. In recent years, in such exposure apparatuses as well, apparatuses provided with a plurality of substrate stages and improved in throughput have been proposed.
For example, Japanese Unexamined Patent Publication (Kokai) No. 10-163098 of the same assignee and U.S. Pat. No. 6,341,007 corresponding to the Japanese Patent Publication disclose a projection exposure apparatus having a plurality of a substrate stages controlled so that the two substrate stages do not contact each other and controlled so that the operation of one stage does not have any effect on the operation of the other stage.
In such a processing apparatus designed for multiprocessing which performs processing in a plurality of chambers etc., sometimes each chamber, that is, each processing system, has different process error.
For example, a CMP system having two chambers is provided with two pads for polishing wafers. Sometimes, the degree of polishing changed slightly with each pad and two types of process error occurred in the polished wafers. Further, in such a CMP system, in quite a few cases, the directions of rotation of the pads for polishing in the chambers are made clockwise and counterclockwise due to the ease of such a mechanical structure. As a result, sometimes two types of process error occur.
When performing exposure by a conventional exposure apparatus for processing all wafers by the same wafer stage and alignment apparatus after such processing, there was the problem that the overlay accuracy at the time of exposure fell. Further, in such a case, in the final analysis, only practical processing to try to reduce the process error itself in the prior step was possible. Effective countermeasures were not taken.
On the other hand, in recently proposed exposure apparatuses provided with two substrate stages an explained above, the exposure apparatus itself generated process error corresponding to the number of the processing systems, that is, process error of the two substrate stages themselves like other processing apparatuses designed for multiprocessing. Therefore, the situation had arisen that when such an exposure apparatus processed wafers etc. after processing by such an apparatus designed for multiprocessing, wafers having two typos of process error were exposed by an exposure apparatus having a further two types of process error, so the process error grew ad therefore the overlay accuracy greatly deteriorated.